STM32
Prefix
brand identifier
Family:
F=Foundation
L=Low-Power
G=Next-Gen
H=High-Perf
W=Wireless
C=Cost
U=Ultra-LP
Core:
0=M0
1=M3
3/4=M4
5=M33
7=M7
Also: GD32F103C8T6 · AT32F103C8T6 · CH32F103C8T6 · APM32F103C8T6 — suffix means the same on every brand
Pin Count
F20
G28
K32
T36
S44
C48 ★
R64 ★
V100 ★
Z144
I176
B208
A169 BGA
Flash Size
416 KB
632 KB
864 KB ★
B128 KB ★
C256 KB ★
D384 KB
E512 KB
F768 KB
G1024 KB 1M
H1536 KB 1.5M
I2048 KB 2M
Artery adds M = 4032 KB (AT32F435/437 only)
Package
TLQFP ★
UQFN / VFQFPN
PTSSOP
HBGA
YWLCSP
NTFBGA
Temperature
6-40 / +85°C ★
7-40 / +105°C
3-40 / +125°C
Artery defaults to 7; most others default to 6
F1 Sub-Series Lines
x00Value — stripped-down, cheaper
x01Access — baseline Cortex-M3
x02USB Access — adds USB device
x03Performance — full peripherals ★
x05Connectivity — USB OTG, dual CAN, I2S
x07Connectivity — adds Ethernet MAC
Clones almost exclusively target x03. A few do x05/x07.
Compatible Brands
GD32GigaDevice!
AT32Artery
APM32Geehy
CH32WCH!
MM32MindMotion!
AG32AGM!
CKS32CKS
HK32Hangshun
N32Nationz
HC32HDSC / Xhera
⚠
Gotchas — Where the Convention Breaks
GD32F303 ≠ STM32F303
Peripheral registers match STM32F103, not F303. F103 binaries work fine; F303 binaries hard-fault. Deliberate GigaDevice choice.
MM32F103 Clock Regs
Clock system register layout is completely different from STM32F1 despite pin-compatible suffix. Not a firmware drop-in.
CH32V003 Pin Codes
Non-standard codes on small parts: J=8, A=16 pins. Larger CH32V2xx/V3xx parts use the standard codes.
AG32 — Cosmetic Only
RISC-V + FPGA hybrid. Suffix correctly encodes pins/flash/package but implies register compatibility that does not exist.
GD32 VDD ≥ 2.6V
Minimum supply is 2.6V vs ST’s 2.0V. Circuits running at 2.0–2.5V will fail silently with a GD32 drop-in.
GD32 Flash Erase 2×
60ms/page vs ST’s 30ms. Dual-die package (MCU + SPI flash). Breaks bootloaders with tight timeouts.